Table of Contents
Advertisement
VIPA System MICRO
3.4 Technical data
3.4.1 Technical data CPU
Order no.
Type
Module ID
Technical data power supply
Power supply (rated value)
Power supply (permitted range)
Reverse polarity protection
Current consumption (no-load operation)
Current consumption (rated value)
Inrush current
I²t
Max. current drain at backplane bus
Max. current drain load supply
Power loss
Technical data digital inputs
Number of inputs
Cable length, shielded
Cable length, unshielded
Rated load voltage
Reverse polarity protection of rated load voltage
Current consumption from load voltage L+ (without load)
Rated value
Input voltage for signal "0"
Input voltage for signal "1"
Input voltage hysteresis
Signal logic input
Frequency range
Input resistance
Input current for signal "1"
Connection of Two-Wire-BEROs possible
Max. permissible BERO quiescent current
Input delay of "0" to "1"
Input delay of "1" to "0"
Number of simultaneously utilizable inputs horizontal con-
figuration
HB400 | CPU | M13-CCF0000 | en | 18-50
M13-CCF0000
CPU M13C
-
DC 24 V
DC 20.4...28.8 V
ü
120 mA
360 mA
3 A
0.1 A²s
1 A
-
7 W
16
1000 m
600 m
DC 24 V
ü
25 mA
DC 24 V
DC 0...5 V
DC 15...28.8 V
-
Sinking input
-
-
3 mA
ü
0.5 mA
3 µs – 15 ms / 0.5 ms – 15 ms
3 µs – 15 ms / 0.5 ms – 15 ms
16
Hardware description
Technical data > Technical data CPU
51
Advertisement
Table of Contents
