YASKAWA VIPA System MICRO Manual page 56

Hardware description
Technical data > Technical data CPU
Order no.
Modules per rack, max.
Number of integrated DP master
Number of DP master via CP
Operable function modules
Operable communication modules PtP
Operable communication modules LAN
Status information, alarms, diagnostics
Status display
Interrupts
Process alarm
Diagnostic interrupt
Diagnostic functions
Diagnostics information read-out
Supply voltage display
Group error display
Channel error display
Isolation
Between channels
Between channels of groups to
Between channels and backplane bus
Between channels and power supply
Max. potential difference between circuits
Max. potential difference between inputs (Ucm)
Max. potential difference between Mana and Mintern
(Uiso)
Max. potential difference between inputs and Mana (Ucm)
Max. potential difference between inputs and Mintern
(Uiso)
Max. potential difference between Mintern and outputs
Insulation tested with
Command processing times
Bit instructions, min.
Word instruction, min.
Double integer arithmetic, min.
Floating-point arithmetic, min.
Timers/Counters and their retentive characteristics
Number of S7 counters
56
M13-CCF0000
8
-
-
-
-
-
yes
yes, parameterizable
yes, parameterizable
yes, parameterizable
yes, parameterizable
possible
green LED
red LED
red LED per group
ü
16
ü
-
DC 75 V/ AC 50 V
-
-
-
-
-
DC 500 V
0.02 µs
0.02 µs
0.02 µs
0.12 µs
512
HB400 | CPU | M13-CCF0000 | en | 18-50
VIPA System MICRO