Wiznet W7500 Reference Manual page 43

PLL output clock (MCLK)

 Internal 8MHz RC oscillator clock (RCLK)
External oscillator clock (8MHz ~ 24MHz) (OCLK)

Each generated clock has own prescaler which can be selected individually by each prescale
value register.
FCLK, ADCCLK, SSPCLK, UARTCLK : 1/1, 1/2, 1/4, 1/8

TIMCLK0, TIMCLK1, PWMCLK0 – PWMCLK7, RTCCLK, WDOGCLK : 1/1, 1/2,

1/4, 1/8, 1/16, 1/32, 1/64, 1/128
W7500x Reference Manual Version1.1.0
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