Ssp1 Registers (Base Address : 0X4000_B000); Ssp1 Control Register 0 (Ssp1Cr0) - Wiznet W7500 Reference Manual

27.6 SSP1 Registers (Base Address : 0x4000_B000)

This section describes the SSP0 registers.

SSP1 Control register 0 (SSP1CR0)

Address offset: 0x0000
Reset value: 0x0000_0000
31 30 29 28
res res res res
15 14 13 12
[3:0] DSS – Data size select:
0000 : reserved, undefined operation
0001 : reserved, undefined operation
0010 : reserved, undefined operation
0011 : 4-bit data
0100 : 5-bit data
0101 : 6-bit data
0110 : 7-bit data
0111 : 8-bit data
1000 : 9-bit data
1001 : 10-bit data
1010 : 11-bit data
1011 : 12-bit data
1100 : 13-bit data
1101 : 14-bit data
1111 : 15-bit data
[5:4] FRF – Frame Format
00 : Motorola SPI frame format
01 : TI synchronous serial frame format
10 : National Microwire frame format
11 : Reserved, undefined operation
[6] SPO – SSPCLKOUT polarity
This is applicable to Motorola SPI frame format only.
[7] SPH – SSPCLKOUT phase
W7500x Reference Manual Version1.1.0
27 26 25
res res res
11 10 9
SCR
R/W
24 23 22 21
res res res res
8 7 6 5
SPH SPO
R/W R/W
20 19 18
res res res
4 3 2
FRF DSS
R/W R/W
389 / 399
17 16
res res
1 0