Wiznet W7500 Reference Manual page 10

Channel-0 interrupt enable register(PWMCH0IER) ........................................ 199
Channel-0 interrupt clear register(PWMCH0ICR) .......................................... 200
Channel-0 Timer/Counter Register (PWMCH0TCR) ........................................ 200
Channel-0 Prescale Counter Register (PWMCH0PCR) ..................................... 201
Channel-0 Prescale Register (PWMCH0PR) .................................................. 201
Channel-0 Match Register (PWMCH0MR) .................................................... 201
Channel-0 Limit Register (PWMCH0LR) ...................................................... 202
Channel-0 Up-Down Mode Register (PWMCH0UDMR) ...................................... 202
Channel-0 Timer/Counter Mode Register (PWMCH0TCMR)............................... 203
Channel-0 PWM output Enable and External input Enable Register (PWMCH0PEEER)
203
Channel-0 Capture Mode Register (PWMCH0CMR) ......................................... 204
Channel-0 Capture Register (PWMCH0CR) .................................................. 204
Channel-0 Periodic Mode Register (PWMCH0PDMR) ....................................... 204
Channel-0 Dead Zone Enable Register (PWMCH0DZER) ................................... 205
Channel-0 Dead Zone Counter Register (PWMCH0DZCR) ................................. 205
21.5 Register map ............................................................................... 206
21.6 PWM Channel-1 Registers (Base address : 0x4000_5100) ........................... 208
Channel-1 interrupt register(PWMCH1IR) ................................................... 208
Channel-1 interrupt enable register(PWMCH1IER) ........................................ 208
Channel-1 interrupt clear register(PWMCH1ICR) .......................................... 209
Channel-1 Timer/Counter Register (PWMCH1TCR) ........................................ 209
Channel-1 Prescale Counter Register (PWMCH1PCR) ..................................... 210
Channel-1 Prescale Register (PWMCH1PR) .................................................. 210
Channel-1 Match Register (PWMCH1MR) .................................................... 211
Channel-1 Limit Register (PWMCH1LR) ...................................................... 211
Channel-1 Up-Down Mode Register (PWMCH1UDMR) ...................................... 212
Channel-1 Timer/Counter Mode Register (PWMCH1TCMR)............................... 212
Channel-1 PWM output Enable and External input Enable Register (PWMCH1PEEER)
213
Channel-1 Capture Mode Register (PWMCH1CMR) ......................................... 213
Channel-1 Capture Register (PWMCH1CR) .................................................. 213
Channel-1 Periodic Mode Register (PWMCH1PDMR) ....................................... 214
Channel-1 Dead Zone Enable Register (PWMCH1DZER) ................................... 214
Channel-1 Dead Zone Counter Register (PWMCH1DZCR) ................................. 215
21.7 Register map ............................................................................... 216
21.8 PWM Channel-2 Registers (Base address : 0x4000_5200) ........................... 217
Channel-2 interrupt register(PWMCH2IR) ................................................... 217
Channel-2 interrupt enable register(PWMCH2IER) ........................................ 217
W7500x Reference Manual Version1.1.0
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