Operation Adc With Interrupt; Registers (Base Address : 0X4100_0000); Adc Control Register (Adc_Ctr) - Wiznet W7500 Reference Manual

Operation ADC with interrupt

Figure 21 shows the flowchart of ADC operation with interrupt.
Operation is almost the same as the non-interrupt mode except checking INT register bit to
know when enabling interrupt mask bit and conversion is completed.
Figure 21. The ADC operation flowchart with interrupt

20.4 Registers (Base address : 0x4100_0000)

ADC control register (ADC_CTR)

Address offset : 0x000
Reset value : 0x0000_0003
W7500x Reference Manual Version1.1.0
START
ADC Power On
(PWD = 0)
Interrupt MASK enable
(MASK = 1)
Select Channel
(ADC_CHSEL)
ADC Start
(ADC_SRT)
Wait until
Interrupt occured
Read ADC conversion data
(ADC_DATA)
YES
ADC again?
NO
ADC Power off
(PWD = 1)
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