Hardware Flow Control - Wiznet W7500 Reference Manual

W7500 series
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Hardware flow control

The RTS flow control is enabled by setting the RTSen of UARTxCR. If RTS is enabled, the data
flow is controlled as follows.
When the receiver FIFO level reaches the programmed trigger level, nUARTRTS(pin) is
asserted(to a low value). nUARTRTS is reasserted(to a low level) once the receiver FIFO has
reached the previous trigger level. The reasserted of nUARTRTS signals to the sending UART to
continue transmitting data.
The CTS flow control is enabled, the transmitter can only transmit data when nUARTCTS is
asserted. When nUARTCTR is re-asserted(to a low) the transmitter sends the next byte. To
stop the transmitter from sending the following byte, nUARTCTS must be released before the
middle of the last stop bit that is currently being sent.
UARTx_TX
start
nUARTCTS
W7500x Reference Manual Version1.1.0
Figure 50. Hardware flow control description
stop
bit0..7
Figure 51. CTS Functional Timing
bits0..7
stop
start
start bits0..7 stop
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