Uart(Universal Asynchronous Receive Transmit); Introduction; Features - Wiznet W7500 Reference Manual

Offset Register
PRESEC
0x2C
reset value
PREMIN
0x30
reset value
PREHOUR
0x34
reset value
PREDAY
0x38 0x38
reset value
PREDATE
0x3C
reset value
PREMON
0x40
reset value
PREYEAR
0x44
reset value
RTCTIME0 CBCDDAY
0x48
reset value 0 0
RTCTIME1
0x4C
reset value 0 0 0 0 0 0
25

UART(Universal Asynchronous Receive Transmit)

25.1 Introduction

The UART supports synchronous one-way communication, half-duplex single wire
communication, and multiprocessor communications(CTS/RTS).

25.2 Features

Serial-to-parallel conversion on data received from a peripheral device
-
Parallel-to-serial conversion on data transmitted to the peripheral device
-
Data size of 5,6,7 and 8 its
-
One or two stop bits
-
Even, odd, stick, or no-parity bit generation and detection
-
Support of hardware flow control
-
Programmable FIFO disabling for 1-byte depth.
-
Programmable use of UART or IrDA SIR input/output
-
False start bit detection
-
W7500x Reference Manual Version1.1.0
nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc
CBCDHOUR
0 0 0 0 0 0 0 0
CBCDYEAR
0 0 0 0 0 0 0 0 0 0
PRESEC
nc nc nc nc nc nc nc
PREMIN
nc nc nc nc nc nc nc
PREHOUR
nc nc nc nc nc nc
nc nc nc nc
PREDATE
nc nc nc nc nc nc
PREMON
nc nc nc nc nc
PREYEAR
CBCDMIN CBCDSEC
0 0 0 0 0 0 0 0 0 0
CBCDMON CBCDDATE
0 0 0 0 0 0 0
Note
Predetermining Second register
Predetermining Minute register
Predetermining Hour register
Predetermining Day register
Predetermining Date register
Predetermining Month register
Predetermining Year register
Consolidated Time0 register
0 0 0 0
Consolidated Time1 register
0 0 0 0
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