Uart2Bdr (Uart2 Baud Rate Divider Register) - Wiznet W7500 Reference Manual

15 14 13 12
res res res res
[3] RXOI –Receive Overrun Interrupt
This bit depends on the state of the ROIE bit in the control register, UART2CR
[2] TXOI – Transmit Overrun Interrupt
This bit depends on the state of the TOIE bit in the control register, UART2CR
[1] RXI – Receive Interrupt
This bit depends on the state of the RXIE bit in the control register, UART2CR
[0] TXI – Transmit Interrupt
This bit depends on the state of the TXIE bit in the control register, UART2CR

UART2BDR (UART2 Baud Rate Divider Register)

Address offset: 0x010
Reset value: 0x0000_0000
The UART2BDR r is the integer part of the baud rate divisor value.
31 30 29 28
res Res res res
15 14 13 12
[19:0] Baud rate divider
The minimum number is 16. These bits are cleared to 0 on reset
Example 1
If the required baud rate is 115200 and UARTCLK = 8MHz then:
Baud rate divisor BAUDDIV = (��
Baud rate divisor = (8 × 10
This means BRD = 69
W7500x Reference Manual Version1.1.0
11 10 9 8
res res res res
27 26 25 24
res res res res
11 10 9 8
BAUDDIV
/�������� ��������)
��������������
6
)/(115200) = 69.4
7 6 5
res res res
23 22 21
res res res
7 6 5
R/W
4 3 2 1
res
RXOI TXOI RXI
R/W R/W R/W
20 19 18 17
res
R/W
4 3 2 1
359 / 399
0
TXI
R/W
16
0