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PWMCLK
Start/Stop
Register
Prescale
1
2
Counter
Timer/Counter
10
Prescale Counter
Overflow
Overflow
Interrupt
Interrupt
Register[2:0]
Figure 31 Timer/Counter timing diagram with overflow interrupt
PWM mode
Pulse Width Modulation mode generates a waveform with a period determined by the value of
limit register and a duty cycle determined by the value of the match register.
The PWM output becomes always 1 when the Timer/Counter starts to count. Then the PWM
output becomes 0 when the Timer/Counter reaches the value of match register. If the
Timer/Counter is in periodic mode, the PWM output becomes 1 again when the Timer/Counter
reaches the value of limit register. In one-shot mode, the PWM output does not change to 1
but stays 0 and the Timer/Counter stops.
The PWM mode can be selected independently on each channel(0~7) by PWM output enable
and external input enable register. The external input pin and PWM output pin are the same,
so external input is disabled in PWM mode.
Figure 32 is an example of the PWM output waveform when the Timer/Counter is reached to
the value of match register.
Figure 33 is example of the PWM output waveform when to the Timer/Counter is reached to
the value of limit register.
W7500x Reference Manual Version1.1.0
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