Dma Channel Request Mask Set Register (Dma_Chnl_Req_Mask_Set) - Wiznet W7500 Reference Manual

15 14 13 12
res res res res
[Channel-1]
dma_sreq[Channel-1] to generate requests.
This Write register enables dma_sreq[Channel-1] to generate requests.
0 – No effect. User the CHNL_USEBURST_SET register to disable
dma_sreq[Channel-1] from generating requests.
1 – Enable dma_sreq[Channel-1] to generate DMA requests.
DMA channel request mask set register
(DMA_CHNL_REQ_MASK_SET)
Address offset : 0x020
Reset value : 0x0000_0000
31 30 29 28
res res res res
15 14 13 12
res res res res
[Channel-1]
dma_req[Channel-1] and dma_sreq[Channel-1], or disables the corresponding channel
from generating DMA requests.
This read/write
dma_sreq[Channel-1], from generating a request. Reading the register returns the
request mask status for dma_req[Channel-1] and dma_sreq[Channel-1].
Read as :
0 – External requests are enabled for channel [Channel-1]
1 – External requests are disabled for channel [Channel-1]
Write as :
0 – No effect. Use the CHNL_REQ_MASK_CLR register to enable DMA requests.
1 – Disables dma_req[Channel-1] and dma_sreq[Channel-1] from generating
DMA requests.
W7500x Reference Manual Version1.1.0
11 10 9 8
res res res res
CHNL_USEBURST_CLR
27 26 25 24
res res res res
11 10 9 8
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CHNL_REQ_MASK_SET
register disables
7 6 5
res res
- Set the appropriate
23 22 21
res res res
7 6 5
res res CHNL_REQ_MASK_SET[5:0]
- Returns the request
a HIGH on dma_req[Channel-1],
4 3 2 1
CHNL_USEBURST_CLR[5:0]
WO
bit to enable
20 19 18 17
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4 3 2 1
R/W
mask status
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0
16
res
0
of
for