SSPCLKOUT/
SSPCLKIN
SSPFSSOUT/
SSPFSSIN
SSPTXD
SSPRXD
nSSPOE
Figure 66.
National Semiconductor Microwire frame format, continuous transfers
Master and Slave configurations
Figure 67 shows how a PrimeCell SSP (PL022) configured as master, interfaces to a Motorola
SPI slave. The SPI Slave Select (SS) signal is permanently tied LOW and configures it as a slave.
Similar to the above operation, the master can broadcast to the slave through the master
PrimeCell SSP SSPTXD line. In response, the slave drives its SPI MISO port onto the SSPRXD line
of the master.
Figure 67. PrimeCell SSP master coupled to an SPI slave
Figure 68 shows a Motorola SPI configured as a master and interfaced to an instance of a
PrimeCell SSP (PL022) configured as a slave. In this case, the slave Select Signal (SS) is
permanently tied HIGH to configure it as a master. The master can broadcast to the slave
through the master SPI MOSI line. In response, the slave drives its nSSPOE signal LOW.
This enables its SSPTXD data onto the MISO line of the master.
W7500x Reference Manual Version1.1.0
LSB
LSB
4 to 16 bits
output data
MS
0
MSB
B
SSPTXD
nSSPOE
SSPRXD
SSPFSSIN
0V
SSPCLKOUT
nSSPCTLOE
SSPFSSOUT
SSPCLKIN
0V
MSB
LSB
8-bit control
LSB
LSB
LSB
MOSI
MISO
SCK
SS
0V
MSB
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