Channel-0 Prescale Counter Register (Pwmch0Pcr); Channel-0 Prescale Register (Pwmch0Pr); Channel-0 Match Register (Pwmch0Mr) - Wiznet W7500 Reference Manual

Channel-0 Prescale Counter Register (PWMCH0PCR)

Base address : 0x4000_5000
Address offset : 0x10
Reset value : 0x0000_0000
31 30 29 28
res res res res
15 14 13 12
res res res res
[5:0] PC – Prescale Counter register
Prescale Counter register. These registers hold the current values of prescale
counter(PC). The PC is incremented to the value stored in PR. When the PC is
reached to PR, the TC is incremented and the PC is reset as 0.

Channel-0 Prescale Register (PWMCH0PR)

Base address : 0x4000_5000
Address offset : 0x14
Reset value : 0x0000_0000
31 30 29 28
res res res res
15 14 13 12
res res res res
[5 - 0] PR – Prescale Register
Prescale register. The PC is incremented when the PC is reached to the PR.

Channel-0 Match Register (PWMCH0MR)

Base address : 0x4000_5000
Address offset : 0x18
Reset value : 0x0000_0000
W7500x Reference Manual Version1.1.0
27 26 25 24
res res res res
11 10 9 8
res res res res
27 26 25 24
res res res res
11 10 9 8
res res res res
23 22 21 20
res res res res
7 6 5 4
res res
23 22 21 20
res res res res
7 6 5 4
res res
19 18 17 16
res res res res
3 2 1 0
PCR
R
19 18 17 16
res res res res
3 2 1 0
PR
R/W
201 / 399