Pwm Common Registers (Base Address : 0X4000_5800); Interrupt Enable Register (Ier) - Wiznet W7500 Reference Manual

21.20 PWM Common Registers (Base address :
0x4000_5800)

Interrupt Enable Register (IER)

Base address : 0x4000_5800
Address offset : 0x00
Reset value : 0x0000_0000
31 30 29 28
res res res res
15 14 13 12
res res res res
[0] IE0 – Channel 0 Interrupt Enable
0 : Channel 0 interrupt is disabled.
1 : Channel 0 interrupt is enabled.
[1] IE1 – Channel 1 Interrupt Enable
0 : Channel 1 interrupt is disabled.
1 : Channel 1 interrupt is enabled.
[2] IE2 – Channel 2 Interrupt Enable
0 : Channel 2 interrupt is disabled.
1 : Channel 2 interrupt is enabled.
[3] IE3 – Channel 3 Interrupt Enable
0 : Channel 3 interrupt is disabled.
1 : Channel 3 interrupt is enabled.
[4] IE4 – Channel 4 Interrupt Enable
0 : Channel 4 interrupt is disabled.
1 : Channel 4 interrupt is enabled.
[5] IE5 – Channel 5 Interrupt Enable
0 : Channel 5 interrupt is disabled.
1 : Channel 5 interrupt is enabled.
[6] IE6 – Channel 6 Interrupt Enable
0 : Channel 6 interrupt is disabled.
1 : Channel 6 interrupt is enabled.
[7] IE7 – Channel 7 Interrupt Enable
0 : Channel 7 interrupt is disabled.
1 : Channel 7 interrupt is enabled.
W7500x Reference Manual Version1.1.0
27 26 25 24
res res res res
11 10 9 8
res res res res
23 22 21 20
res res res res
7 6 5 4
IE7 IE6 IE5 IE4
R/W R/W R/W R/W
19 18 17 16
res res res res
3 2 1 0
IE3 IE2 IE1 IE0
R/W R/W R/W R/W
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