Channel-0 Capture Mode Register (Pwmch0Cmr); Channel-0 Capture Register (Pwmch0Cr); Channel-0 Periodic Mode Register (Pwmch0Pdmr) - Wiznet W7500 Reference Manual

Channel-0 Capture Mode Register (PWMCH0CMR)

Base address : 0x4000_5000
Address offset : 0x2C
Reset value : 0x0000_0000
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[0] CM – Capture mode
0 : Timer/Counter is captured when external input signal is rising edge.
1 : Timer/Counter is captured when external input signal is falling edge.

Channel-0 Capture Register (PWMCH0CR)

Base address : 0x4000_5000
Address offset : 0x30
Reset value : 0x0000_0000
31
[31:0] CR – Capture Register
Capture register. The CR is loaded with the value of the TC when external
input signal is triggered.

Channel-0 Periodic Mode Register (PWMCH0PDMR)

Base address : 0x4000_5000
Address offset : 0x34
Reset value : 0x0000_0000
31 30 29 28
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CR
R
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0
CM
R/W
0
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