Dma Channel Wait On Request Status Register (Dma_Waitonreq_Status); Dma Channel Software Request Register (Dma_Chnl_Sw_Request) - Wiznet W7500 Reference Manual

[31:0] ALT_CTRL_BASE_PTR : Base address of the alternate data structure
This read only register returns the base address of the alternate data structure.
DMA channel wait on request status register
(DMA_WAITONREQ_STATUS)
Address offset : 0x010
Reset value : 0x0000_0000
31 30 29 28
res res res res
15 14 13 12
res res res res
[Channel-1] DMA_WAITONREQ – Channel wait on request status
This read-only register returns the status of dma_waitonreq[Channel-1].
0 : dma_waitonreq is low
1 : dma_waitonreq is high
DMA channel software request register
(DMA_CHNL_SW_REQUEST)
Address offset : 0x014
Reset value : -
31 30 29 28
res res res res
15 14 13 12
res res res res
[Channel-1] CHNL_SW_REQUEST – Set the appropriate bit to generate a software DMA
request on the corresponding DMA channel
This read-only register enables to generate a software DMA request.
0 : dose not create a DMA request for [Channel-1]
W7500x Reference Manual Version1.1.0
27 26 25 24
res res res res
11 10 9 8
res res res res
27 26 25 24
res res res res
11 10 9 8
res res res res
RO
23 22 21
res res res
7 6 5
res res
23 22 21
res res res
7 6 5
res res
20 19 18 17
res res res res
4 3 2 1
DMA_WAITONREQ[5:0]
RO
20 19 18 17
res res res res
4 3 2 1
CHNL_SW_REQUEST[5:0]
WO
171 / 399
16
res
0
16
res
0