Registers (Base Address : 0X4100_3000); Pad Control Register (Px_Y Pcr)(X=A..d, Y=0..15; Register Map - Wiznet W7500 Reference Manual

17.4 Registers (Base address : 0x4100_3000)

PAD Control register (Px_y PCR)(x=A..D, y=0..15)

Address offset : 0x000
Reset value : 0x0000_0060
31 30 29 28
res res res res
15 14 13 12
res res res res
[1:0] PUPD – Pull-up, Pull-down selection register
These bits are written by S/W.
00 : Neither
01 : pull-down
10 : pull-up
11 : Neither
[2] DS – Driving strength selection register
0 : High driving strength
1 : Low driving strength
[3] OD – Open Drain output mode register
0 : Open Drain output mode disable
1 : Open Drain output mode enable
[5] IE : Input buffer enable selection register
0 : Input buffer disable
1 : Input buffer enable
[6] CS – CMOS input or Summit trigger input selection register
0 : Summit trigger input buffer
1 : CMOS input buffer

17.5 Register map

The following Table 12 summarizes the PAD controller registers.
W7500x Reference Manual Version1.1.0
27 26 25 24
res res res res
11 10 9 8
res res Res res
Table 12 PAD controller register map and reset values
23 22 21 20
res res res res
7 6 5 4
res CS IE res
R/W R/W
19 18 17 16
res res res res
3 2 1 0
OD DS PUPD
R/W R/W R/W
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