Dma Control Data Base Pointer Register (Dma_Ctrl_Base_Ptr); Dma Channel Alternate Control Data Base Pointer Register (Dma_Alt_Ctrl_Base_Ptr) - Wiznet W7500 Reference Manual

[0] ENABLE – Enable for the controller
This bit is write only register to enable of DMA controller
0 : disable the controller
1 : enable the controller
[7:5] PROT_CTRL – Set the AHB-Lite protection by controlling the HPROT[3:1] signal
levels
These bits are write only register to set HPROT[3:1] signal as follows
[7] : controls HPROT[3] to indicate if a cacheable access is occurring.
[6] : controls HPROT[2] to indicate if a bufferable access is occurring.
[5] : controls HPROT[1] to indicate if a privileged access is occurring.

DMA control data base pointer register (DMA_CTRL_BASE_PTR)

Address offset : 0x008
Reset value : 0x0000_0000
31 30 29 28
15 14 13 12
CTRL_BASE_PTR[15:8]
R/W
[31:8] CTRL_BASE_PTR – Pointer to the base address of the primary data structure
These bits are read/write register. User must configure this register so that the base
pointer points to a location in system memory.
DMA channel alternate control data base pointer register
(DMA_ALT_CTRL_BASE_PTR)
Address offset : 0x00c
Reset value : 0x0000_0000
31 30 29 28
15 14 13 12
W7500x Reference Manual Version1.1.0
27 26 25 24
CTRL_BASE_PTR[31:16]
R/W
11 10 9 8
27 26 25 24
ALT_CTRL_BASE_PTR[31:16]
11 10 9 8
ALT_CTRL_BASE_PTR[15:0]
23 22 21
7 6 5
res res res res
23 22 21
RO
7 6 5
20 19 18 17
4 3 2 1
res res res
20 19 18 17
4 3 2 1
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16
0
res
16
0