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22.1
Introduction ................................................................................ 275
22.2
Features .................................................................................... 275
22.3
Functional description ................................................................... 276
Clock and clock enable ........................................................................ 276
Timer size.... .................................................................................... 276
Prescaler.... ...................................................................................... 276
Repetition mode................................................................................. 276
Interrupt.... ...................................................................................... 277
Operation.... ..................................................................................... 277
How to set the dual timers .................................................................... 278
22.4
Dual timer0_0 Registers (Base address : 0x4000_1000) ............................ 279
Timer0_0 Load Register(DUALTIMER0_0TimerLoad) ....................................... 279
Timer0_0 Value Register(DUALTIMER0_0TimerValue) ..................................... 279
Timer0_0 Control Register(DUALTIMER0_0TimerControl) ................................ 279
Timer0_0 Interrupt Clear Register (DUALTIMER0_0TimerIntClr) ........................ 280
Timer0_0 Raw Interrupt Status Register (DUALTIMER0_0TimerRIS) .................... 280
Timer0_0 Masked Interrupt Status Register (DUALTIMER0_0TimerMIS) ................ 281
Timer0_0 Background Load Register (DUALTIMER0_0TimerBGLoad) ................... 281
22.5
Register map ............................................................................... 283
22.6
Dual timer0_1 Registers (Base address : 0x4000_1020) ............................ 284
Timer0_1 Load Register(DUALTIMER0_1TimerLoad) ....................................... 284
Timer0_1 Value Register(DUALTIMER0_1TimerValue) ..................................... 284
Timer0_1 Control Register(DUALTIMER0_1TimerControl) ................................ 284
Timer0_1 Interrupt Clear Register (DUALTIMER0_1TimerIntClr) ........................ 285
Timer0_1 Raw Interrupt Status Register (DUALTIMER0_1TimerRIS) .................... 285
Timer0_1 Masked Interrupt Status Register (DUALTIMER0_1TimerMIS) ................ 286
Timer0_1 Background Load Register (DUALTIMER0_1TimerBGLoad) ................... 286
22.7
Register map ............................................................................... 288
22.8
Dual Timer 0 Clock Enable Register (Base address : 0x4000_1080) .............. 289
Timer0_0 Clock Enable Register (TIMCLKEN0_0) .......................................... 289
Timer0_1 Clock Enable Register (TIMCLKEN0_1) .......................................... 289
22.9
Register map ............................................................................... 290
22.10
Dual timer1_0 Registers (Base address : 0x4000_2000) ............................ 291
Timer1_0 Load Register(DUALTIMER1_0TimerLoad) ....................................... 291
Timer1_0 Value Register(DUALTIMER1_0TimerValue) ..................................... 291
Timer1_0 Control Register(DUALTIMER1_0TimerControl) ................................ 291
Timer1_0 Interrupt Clear Register (DUALTIMER1_0TimerIntClr) ........................ 292
Timer1_0 Raw Interrupt Status Register (DUALTIMER1_0TimerRIS) .................... 292
Timer1_0 Masked Interrupt Status Register (DUALTIMER1_0TimerMIS) ................ 293
W7500x Reference Manual Version1.1.0
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