[7:0] ILPDVSR – 8-bit low-power divisor value
These bits are cleared to 0 at reset
Where,
16
The divisor is 1.42MHz <
– 2.11us.
UART1IBRD (UART1 Integer Baud Rate Register)
Address offset: 0x0024
Reset value: 0x00
The UART1IBRD Register is the integer part of the baud rate divisor value.
31
30
29
28
res
res
res
res
15
14
13
12
[15:0] BAUD DIVINT – The integer baud rate divisor.
These bits are cleared to 0 on reset
UART1FBRD (UART1 Fractional Baud Rate Register)
Address offset: 0x0028
Reset value: 0x00
The UART1FBRD register is the fractional part of the baud rate divisor value.
31
30
29
28
res
res
res
res
15
14
13
12
res
res
res
res
[5:0] BAUD DIVFRAC – The fractional baud rate divisor.
These bits are cleared to 0 on reset
W7500x Reference Manual Version1.1.0
ILPDVSR = (
is nominally 1.8432MHz
< 2.12MHz, results in a low-power pulse duration of 1.41
16
27
26
25
24
res
res
res
res
11
10
9
8
BAUD DIVINT
27
26
25
24
res
res
res
res
11
10
9
8
res
res
res
res
/
)
16
23
22
21
res
res
res
7
6
5
w
23
22
21
res
res
res
7
6
5
res
res
R/W
20
19
18
17
res
res
res
res
4
3
2
1
20
19
18
17
res
res
res
res
4
3
2
1
BAUD DIVFRAC
w
345 / 399
16
res
0
16
res
0