Setting For Multiple Cpu Advanced Synchronous Control - Mitsubishi Electric MELSEC iQ-R Series Programming Manual

Setting for Multiple CPU advanced synchronous control

The setting of the master CPU and slave CPU are necessary for Multiple CPU advanced synchronous control.
Also, in order to monitor the information of other CPUs that constitute the Multiple CPU advanced synchronous control, setting
of the status device of each CPU is executed.
The settings for Multiple CPU advanced synchronous control are set in the Multiple CPU advanced synchronous control
setting.
[Motion Control Parameter]  [Synchronous Control Parameter]  [Multiple CPU advanced synchronous control
setting]
Item
Multiple CPU advanced synchronous control CPU setting
*1*2
Status device setting Synchronous controlling
Master CPU input axis
Status for each CPU
Error status for each CPU and axis
*1 By setting devices for CPU No.2 to 4, the status of each Motion CPU can be monitored.
*2 If Motion CPU is set to independent operation, nothing will be stored in the device.
*3 Can be set when Multiple CPU synchronous control setting is "Slave CPU".
*4 This setting can be omitted.
A delay of two operation cycles occurs for the device value assigned to each Motion CPU.
Multiple CPU advanced synchronous control CPU setting
Execute the setting of the master CPU and slave CPU that constitute the Multiple CPU advanced synchronous control.
Setting value
0: Independent CPU
1: Master CPU
2: Slave CPU
In a Multiple CPU system configuration, it is possible to have a mixture of Motion CPU that operate independently
(independent CPU), and Motion CPU that operate in Multiple CPU synchronous control (master CPU, slave CPU).
If configuring a Multiple CPU system, it is necessary to have one master CPU, and at least one slave CPU.
• Set the same operation cycle for all Motion CPU that are executing Multiple CPU advanced synchronous
control.
• For the master CPU and slave CPU, the operation time is approximately an additional 130[μs] more
compared to an independent CPU. When an operation cycle over is detected, change the operation cycle to
a larger value.
*3
Transfer information
Error information
Description
Operates as an independent CPU. (Operation in normal state that does not use Multiple CPU advanced synchronous
control.)
Operates as master CPU. (Can be set in a Motion CPU other than CPU No.2.)
Operates as slave CPU.
Setting range
0: Independent CPU/1: Master CPU/2: Slave CPU
*4
Word device/Bit device/
8 AUXILIARY AND APPLIED FUNCTIONS
8.4 Multiple CPU Advanced Synchronous Control
Default value
Independent CPU
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8
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