Pwe3 N-To-1 Cell Mode - Alcatel-Lucent 7750 SR OS Service Manual

ATM VLLs can be configured with both endpoints (SAPs) on the same router or with the two
endpoints on different 7750 SRs. In the latter case, Pseudowire Emulation Edge-to-Edge (PWE3)
signalling is used to establish a pseudowire between the devices allowing ATM traffic to be
tunneled through an MPLS or GRE network:
Two pseudowire encapsulation modes, i.e., SDP vc-type, are available:
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The endpoints of Frame Relay VLLs must be Data-Link Connection Identifiers (DLCIs) on any
port that supports Frame Relay. The pseudowire encapsulation, or SDP vc-type, supported is the
1-to-1 Frame Relay encapsulation mode.

PWE3 N-to-1 Cell Mode

The endpoints of an N-to-1 mode VLL can be:
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For N-to-1 mode VLLs, cell concatenation is supported. Cells will be packed on ingress to the
VLL and unpacked on egress. As cells are being packed, the concatenation process may be
terminated by:
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In N-to-1 mode, OAM cells are transported through the VLL as any other cell. The PTI and CLP
bits are untouched, even if VPI/VCI translation is carried out.
7750 SR OS Services Guide
PWE3 N-to-1 Cell Mode Encapsulation
PWE3 AAL5 SDU Mode Encapsulation
ATM VCs — VPI/VCI translation is supported (i.e., the VPI/VCI at each endpoint does
not need to be the same).
ATM VPs — VPI translation is supported (i.e., the VPI at each endpoint need not be the
same, but the original VCI will be maintained).
ATM VTs (a VP range) — No VPI translation is supported (i.e., the VPI/VCI of each cell
is maintained across the network).
ATM ports — No translation is supported (i.e., the VPI/VCI of each cell is maintained
across the network).
Reaching a maximum number of cells per packet.
Expiry of a timer.
(Optionally) change of the CLP bit.
(Optionally) change of the PTI bits indicating end of AAL5 packet.
Virtual Leased Line Services
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