External Bus Interface
CLKOUT
BR
BG
RECEIVE BUS GRANT AND BUS BUSY NEGATED
ASSERT BB, DRIVE ADDRESS AND ASSERT TS
BB
A[6:31]
RD/WR
TSIZ[0:1],AT[0:3]
BURST
TS
DATA
TA
WAIT STATE
DATA IS VALID
Figure 13-5. Single Beat Read Cycle–Basic Timing–One Wait State
MOTOROLA
MPC823e REFERENCE MANUAL
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