Address Transfer Phase-Related Signals; Transfer Start Signal - Motorola MPC823e Reference Manual

Microprocessor for mobile computing
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EXT MASTER
REQUESTS BUS
BR = 1
IDLE
BG = 1
BB = T.S
MPC823e NO LONGER
NEEDS THE BUS
BR = 0
THE EXTERNAL DEVICE THAT
HAS A HIGHER PRIORITY THAN
THE CURRENT INTERNAL BUS
MASTER REQUESTS THE BUS
Figure 13-23. Internal Bus Arbitration State Machine

13.4.7 Address Transfer Phase-Related Signals

13.4.7.1 TRANSFER START SIGNAL. The TS signal indicates the beginning of a cycle
initiated by the bus master. This signal must be asserted by a master only after ownership
of the bus is granted by the arbitration protocol. This signal is only asserted for the first clock
cycle of the transaction and is negated in the successive clock cycles. The master must
three-state this signal when it relinquishes the bus to avoid contention between two or more
masters in this signal. This configuration requires an external pull-up resistor to be
connected to the TS signal. This will prevent a slave from responding to a bogus TS
assertion. Refer back to Figure 13-21 for more information.
MOTOROLA
EXT OWNER
BG = 0
MPC823e INTERNAL MASTER WITH HIGHER
BB = T.S
PRIORITY THAN THE EXTERNAL DEVICE
REQUIRES THE BUS
EXT MASTER
RELEASE BUS
MPC823e NEEDS
THE BUS
MPC823e OWNER
BG = 1
BB = 0
MPC823e REFERENCE MANUAL
External Bus Interface
BB = 0
MPC823e BUS WAIT
BG = 1
BB = T.S
BB = 1
MPC823e STILL NEEDS
THE BUS
13-31

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