Memory Management Unit
PAGES OVER 4K WITH 4K RESOLUTION PROTECTION
PP4 SETTING
00
01
10
11
LPS—Large Page Size
This bit must be set to 0 for 1K resolution protection.
0 = 1K or 4K.
1 = 16K.
SH—Shared Page
0 = This entry matches only if the ASID filed in the TLB entry matches the value of the
M_CASID register.
1 = ASID comparison is disabled for a TLB entry.
CI—Cache Inhibit
This bit is the cache-inhibit attribute for a TLB entry.
V—Valid
This bit indicates that a TLB entry is valid.
11-30
CASE: MD_CTR (PPCS) = 1
Must be zero
Reserved
Reserved
Reserved
MPC823e REFERENCE MANUAL
MOTOROLA