Table 3.7-3 Switching To And From Clock Mode (Product With Power-On Reset Function In Dual-Clock Configuration); Table 3.7-4 Switching To And From Standby Mode (Product With Power-On Reset Function In Dual-Clock Configuration) - Fujitsu F2MC-8L Series Hardware Manual

8-bit microcontroller
Hide thumbs Also See for F2MC-8L Series:
Table of Contents

Advertisement

CHAPTER 3 CPU
Switching to and from clock mode (not in standby mode)
Table 3.7-3 Switching to and from Clock Mode (Product with Power-on Reset Function in Dual-clock
Configuration)
State transition
Transition to normal (main-
RUN) state in main clock
mode after power-on reset
Reset in main-RUN state
Transition from main-RUN
state to sub-RUN state
Wake-up from sub-RUN
state to main-RUN state
Reset in sub-RUN state
SYCC:
*:
Switching to and from standby mode
Table 3.7-4 Switching to and from Standby Mode (Product with Power-on Reset Function in Dual-clock
Configuration)
State transition
Transition to sleep mode
Wake-up from sleep mode
Transition to stop mode
84
End of main clock oscillation stabilization delay time (Timebase timer
[1]
output)
[2]
Reset input canceled
[3]
External reset, software reset, or watchdog reset
[4]
SYCC: SCS = "0"*
[5]
SYCC: SCS = "1"
End of main clock oscillation stabilization delay time
[6]
(This can be checked with the SCM bit in SYCC register.)
[7]
External reset, software reset, or watchdog reset
[8]
External reset, software reset, or watchdog reset
System clock control register
Transition to the sub-RUN state immediately after turning the power on takes place
after the end of the subclock oscillation stabilization delay time.
main clock mode
(1)
STBC : SLP="1"
(2)
Interrupts (various types)
(3)
External reset
(4)
STBC : STP="1"
Transition conditions
Transition conditions
<1>
STBC : SLP= "1"
<2>
Interrupts (various types)
<3>
External reset
<4>
STBC : STP="1"
Subclock mode

Advertisement

Table of Contents
loading

Table of Contents