Removing and Installing DIMMs
To understand the rules for adding memory, it helps to understand the basic architecture of the
memory subsystem that drives the rules and the terminology used.
The DIMMs reside on the memory board in the processor/memory module.
Two Rambus channels run from the processor board to each memory board.
There is one DMH device per Rambus channel.
Each DMH supports two DDR branch channels.
Each DDR branch channel supports two 184 pin DDR DIMMs.
This results in eight DIMMs per memory board, for a total of 16 DIMM connectors in the
system.
A "row" consists of four DDR DIMMs, one off of each DMH, which collectively make-up a
cache line.
To remove or install the DIMMs, remove the processor/memory module from the chassis and
follow the Rules for Adding Memory.
Rules for Adding Memory
The following rules apply when adding memory to the memory boards:
DIMMs must be populated in groups of four referred to as a "row." Each memory row requires
population of DIMMs on both memory boards. The four rows of DIMMs are defined below
and in Figure 98:
Row A, DIMM connectors 1 and 3 on both memory boards
Row B, DIMM connectors 6 and 8 on both memory boards
Row C, DIMM connectors 2 and 4 on both memory boards
Row D, DIMM connectors 5 and 7 on both memory boards
Within a single row, all DIMMs must be identical. (Identical DIMM size AND identical
number of devices on the DIMM).
Each of the four possible DIMM rows can be populated with different technologies.
However, for best performance, the amount of memory on each DMH DDR branch channel
should be the same to enable the benefits of memory interleaving which means, the amount of
memory in the "left" DIMMs in Figure 98 should equal the amount of memory in the
"right" DIMMs.
Intel® SR870BN4 Server System Product Guide
221
Need help?
Do you have a question about the SR870BN4 - Server Platform - 0 MB RAM and is the answer not in the manual?