Mcbsp Registers - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers
11.3 Registers
Address Offset Acronym
0h DRR_REG
8h DXR_REG
10h SPCR2_REG
14h SPCR1_REG
18h RCR2_REG
1Ch RCR1_REG
20h XCR2_REG
24h XCR1_REG
28h SRGR2_REG
2Ch SRGR1_REG
30h MCR2_REG
34h MCR1_REG
38h RCERA_REG
3Ch RCERB_REG
40h XCERA_REG
44h XCERB_REG
48h PCR_REG
4Ch RCERC_REG
50h RCERD_REG
54h XCERC_REG
58h XCERD_REG
5Ch RCERE_REG
60h RCERF_REG
64h XCERE_REG
68h XCERF_REG
6Ch RCERG_REG
70h RCERH_REG
74h XCERG_REG
78h XCERH_REG
7Ch REV_REG
80h RINTCLR_REG
84h XINTCLR_REG
88h ROVFLCLR_REG
8Ch SYSCONFIG_REG
90h THRSH2_REG
94h THRSH1_REG
A0h IRQSTATATUS
A4h IRQENABLE
A8h WAKEUPEN
ACh XCCR_REG
B0h RCCR_REG
B4h XBUFFSTAT_REG
B8h RBUFFSTAT_REG
C0h STATUS_REG
1176
Multichannel Buffered Serial Port (McBSP)
Preliminary
Table 11-19. McBSP Registers
Register Name
McBSP data receive register
McBSP data transmit register
McBSP serial port control register 2
McBSP serial port control register 1
McBSP receive control register 2
McBSP receive control register 1
McBSP transmit control register 2
McBSP transmit control register 1
McBSP sample rate generator register 2
McBSP sample rate generator register 1
McBSP multichannel register 2
McBSP multichannel register 1
McBSP receive channel enable register partition A
McBSP receive channel enable register partition B
McBSP transmit channel enable register partition A
McBSP transmit channel enable register partition B
McBSP pin control register
McBSP receive channel enable register partition C
McBSP receive channel enable register partition D
McBSP transmit channel enable register partition C
McBSP transmit channel enable register partition D
McBSP receive channel enable register partition E
McBSP receive channel enable register partition F
McBSP transmit channel enable register partition E
McBSP transmit channel enable register partition F
McBSP receive channel enable register partition G
McBSP receive channel enable register partition H
McBSP transmit channel enable register partition G
McBSP transmit channel enable register partition H
McBSP revision number register
McBSP receive interrupt clear register
McBSP transmit interrupt clear register
McBSP receive overflow interrupt clear register
McBSP system configuration register
McBSP transmit buffer threshold register (DMA or IRQ trigger)
McBSP receive buffer threshold register (DMA or IRQ trigger)
McBSP interrupt status register (OCP compliant IRQ line)
McBSP interrupt enable register (OCP compliant IRQ line)
McBSP wakeup enable register
McBSP transmit configuration control register
McBSP receive configuration control register
McBSP transmit buffer status register
McBSP receive buffer status register
McBSP status register
© 2011, Texas Instruments Incorporated
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Section
Section 11.3.1
Section 11.3.2
Section 11.3.3
Section 11.3.4
Section 11.3.5
Section 11.3.6
Section 11.3.7
Section 11.3.8
Section 11.3.9
Section 11.3.10
Section 11.3.11
Section 11.3.12
Section 11.3.13
Section 11.3.14
Section 11.3.15
Section 11.3.16
Section 11.3.17
Section 11.3.18
Section 11.3.19
Section 11.3.20
Section 11.3.21
Section 11.3.22
Section 11.3.23
Section 11.3.24
Section 11.3.25
Section 11.3.26
Section 11.3.27
Section 11.3.28
Section 11.3.29
Section 11.3.30
Section 11.3.31
Section 11.3.32
Section 11.3.33
Section 11.3.34
Section 11.3.35
Section 11.3.36
Section 11.3.37
Section 11.3.38
Section 11.3.39
Section 11.3.40
Section 11.3.41
Section 11.3.42
Section 11.3.43
Section 11.3.44
SPRUGX9 – 15 April 2011
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