Mcbsp_Rcera_Reg; Mcbsp_Rcerb_Reg; Mcbsp_Mcr1_Reg Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers
Table 11-31. McBSP_MCR1_REG Field Descriptions (continued)
Bit Field
0 RMCM
11.3.13 McBSP Receive Channel Enable Register Partition A (RCERA_REG)
The McBSP_RCERA_REG register is shown in
31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
31-16 Reserved
15-0 RCERA
11.3.14 McBSP Receive Channel Enable Register Partition B (RCERB_REG)
The McBSP_RCERB_REG register is shown in
31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
31-16 Reserved
15-0 RCERB
1190
Multichannel Buffered Serial Port (McBSP)
Preliminary
Value Description
Receive Multichannel Selection Enable
0 All 128 channels
1 All channels disabled by default.
Required channels are selected by enabling RP(A/B)BLK and RCER(A/B) appropriately.
Figure 11-45. McBSP_RCERA_REG
R-0
Table 11-32. McBSP_RCERA_REG Field Descriptions
Value Description
0 Reserved.
0 Receive Channel Enable.
RCERA n=0 Disables reception of n-th channel in an even-numbered block in partition A.
RCERA n=1 Enables reception of n-th channel in an even-numbered block in partition A.
Figure 11-46. McBSP_RCERB_REG
R-0
Table 11-33. McBSP_RCERB_REG Field Descriptions
Value Description
0 Reserved.
0 Receive Channel Enable.
RCERB n=0 Disables reception of n-th channel in a even-numbered block in partition B.
RCERB n=1 Enables reception of n-th channel in a even-numbered block in partition B.
© 2011, Texas Instruments Incorporated
Figure 11-45 and described in
16 15
Figure 11-46 and described in
16 15
www.ti.com
Table 11-32.
RCERA
R/W-0
Table 11-33.
RCERB
R/W-0
SPRUGX9 – 15 April 2011
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