Transmit Clock Failure Detection Circuit Block Diagram - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Architecture
10.2.8.4.6.2 Transmit Clock Failure Check and Recovery
The transmit clock failure check circuit
and the external high-frequency serial clock (AHCLKX). It continually counts the number of system
clocks for every 32 high rate serial clock (AHCLKX) periods, and stores the count in XCNT of the
transmit clock check control register (XCLKCHK) every 32 high rate serial clock cycles.
The logic compares the count against a user-defined minimum allowable boundary (XMIN), and
automatically flags an interrupt (XCKFAIL in XSTST) when an out-of-range condition occurs. An
out-of-range minimum condition occurs when the count is smaller than XMIN. The logic continually
compares the current count (from the running system clock counter) against the maximum allowable
boundary (XMAX). This is in case the external clock completely stops, so that the counter value is not
copied to XCNT. An out-of-range maximum condition occurs when the count is greater than XMAX.
Note that the XMIN and XMAX fields are 8-bit unsigned values, and the comparison is performed using
unsigned arithmetic.
An out-of-range count may indicate either that an unstable clock was detected, or that the audio source
has changed and a new sample rate is being used.
In order for the transmit clock failure check circuit to operate correctly, the high-frequency serial clock
divider must be taken out of reset regardless if AHCLKX is internally generated or externally sourced.
Figure 10-30. Transmit Clock Failure Detection Circuit Block Diagram
External
Count
AHCLKX
to 32
pin input
McASP Prescale
system /1 to
(A)
clock /256
XCLKCHK[3−0]
XPS
XCLKCHK[15−8]
XMIN
XCLKCHK[23−16]
XMAX
A Refer to device data manual for the McASP system clock source. This is not the same as AUXCLK.
1054
Multichannel Audio Serial Port (McASP)
Preliminary
(Figure
Sync to
system
clock
Clear
8−bit
counter
Count
8
4
Load
XCLKCHK[31−24]
XCNT
8
8
XCNT<XMIN?
8
Counter>XMAX?
8
© 2011, Texas Instruments Incorporated
10-30) works off both the internal McASP system clock
True
Set XSTAT.2
OR
XCKFAIL
True
XCLKCHK.7
XCKFAILSW
www.ti.com
Interrupt
mute
Switch to internal
AND AHCLKX1
reset McASP
transmitter,
enter underrun
(D15 mode only)
send BMC 0's
when clock is bad
external
SPRUGX9 – 15 April 2011
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