Sata Interface Signal Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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16.2.2 Signal Description
The device has bonded out the Data lines (two sets of differential data lines) and device activity per port
indicators. Signals needed to detect device detection and attached device power indicators need to be
implemented via GPIO if desired and no dedicated signals for these tasks exist. The power pins and
logic necessary to power up a cold SATA device should be handled external to the device.
Table 16-2 summarizes the available SATA module signals.
Terminal Name
SATA_RXP0
SATA_RXN0
SATA_TXP0
SATA_TXN0
SATA_RXP1
SATA_RXN1
SATA_TXP1
SATA_TXN1
SERDES_CLKP
SERDES_CLKN
SATA_ACT0_LED
SATA_ACT1_LED
VDD_SATA
VSS_SATA
VDDT_SATA
VSST_SATA
(1)
Multiplexed with GPIO 30.
(2)
Multiplexed with GPIO 31.
16.2.3 DMA
Each HBA ports contain two DMA engines. One of the DMA engine is used to fetch command from the
command list. The other DMA is used to move FISes in and out of system memory
The DMA used to move FISs in and out of system memory has a register, P#DMACR (one for each
HBA port where # = 0 or 1), to control the burst transfer. This DMA is used to transfer all information
between system memory and the attached SATA device, as well as configuration and status FISs.
The user can program the maximum burst size that will be issued on the system bus independently for
both reads and writes. The DMA will issue transactions equaling the programmed size or smaller (in
DWORD increments). This can be used to optimize burst size for over-all system throughput efficiency.
Refer to Section 16.4.33
a transaction size (below), while is not invalid, is meaningless because the DMA maximizes out at the
maximum transaction size.
The user can also program the transaction size for both receive and transmit (see
The transaction size is the minimum amount of data that the DMA will work on. For example, if there is
an FIS coming from the device to the host, the DMA will not begin transferring data into system memory
until there is at least RX_TRANSACTION_SIZE (RXTS) data in the receive FIFO. During transmit, the
DMA will read data from system memory in TX_TRANSACTION_SIZE (TXTS) increments to put into
the transmit FIFO. Note that transactions may be broken up into multiple bursts based on burst size,
crossing of a 1k boundary, or end-of-frame.
SPRUGX9 – 15 April 2011
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Preliminary
Table 16-2. SATA Interface Signal Descriptions
Direction from the HBA
Perspective (In/Out) Description
Input Receive Data Positive Differential Signal for Port 0
Input Receive Data Negative Differential Signal for Port 0
Input Transmit Data Positive Differential Signal for Port 0
Input Transmit Data Positive Differential Signal for Port 0
Input Receive Data Positive Differential Signal for Port 1
Input Receive Data Positive Differential Signal for Port 0
Input Transmit Data Positive Differential Signal for Port 1
Input Transmit Data Negative Differential Signal for Port 1
Input PHY Reference Positive Differential Signal
Input PHY Reference Negative Differential Signal
(1)
Output Device Activity Indicator for HBA Port 0
(2)
Output Device Activity Indicator for HBA Port 1
for details on legal values. Note that programming a burst size of greater than
© 2011, Texas Instruments Incorporated
Architecture
Section 16.4.33).
Serial ATA (SATA) Controller
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