Transfer Length Configuration Register (Sd_Blk); Transfer Length Configuration Register (Sd_Blk) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers

9.4.11 Transfer Length Configuration Register (SD_BLK)

This register shall be used for any card. SD_BLK[BLEN] is the block size register. SD_BLK[NBLK] is
the block count register.
The transfer length configuration register (SD_BLK) is shown in
Table 9-21.
31
NBLK
R/W-0
LEGENDR/W = Read/Write; R = Read only; -n = value after reset
Table 9-21. Transfer Length Configuration Register (SD_BLK) Field Descriptions
Bit Field
31-16 NBLK
15-12 Reserved
11-0 BLEN
974
Secure Digital (SD)/—Secure Digital I/O (SDIO) Card Interface
Preliminary
Figure 9-39. Transfer Length Configuration Register (SD_BLK)
16 15
Reserved
R-0
Value Description
Blocks count for current transfer. This register is enabled when Block count Enable
(SD_CMD[1] BCE bit) is set to 1 and is valid only for multiple block transfers. Setting the block
count to 0 results no data blocks being transferred.
NoteThe host controller decrements the block count after each block transfer and stops when
the count reaches zero.
This register can be accessed only if no transaction is executing (i.e., after a transaction has
stopped). Read operations during transfers may return an invalid value and write operation will
be ignored. In suspend context, the number of blocks yet to be transferred can be determined
by reading this register. When restoring transfer context prior to issuing a Resume command,
The local host shall restore the previously saved block count.
0 Stop count
1h 1 block
2h 2 blocks
FFFFh 65535 blocks
0 Reserved bit field. Do not write any value.
Transfer block size. This register specifies the block size for block data transfers. Read
operations during transfers may return an invalid value, and write operations are ignored.
When a CMD12 command is issued to stop the transfer, a read of the BLEN field after transfer
completion (SD_STAT[1] TC bit set to 1) will not return the true byte number of data length
while the stop occurs but the value written in this register before transfer is launched.
0 No data transfer
1h 1 byte block length
2h 2 bytes block length
3h 3 bytes block length
1FFh 511 bytes block length
200h 512 bytes block length
7FFh 2047 bytes block length
800h 2048 bytes block length
© 2011, Texas Instruments Incorporated
Figure 9-39 and described in
12 11
www.ti.com
0
BLEN
R/W-0
SPRUGX9 – 15 April 2011
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