Ddc I2C Fifo Count Register (Ddc_Fifocnt); Ddc I2C Data Register (Ddc_Data) Field Descriptions; Ddc I2C Fifo Count Register (Ddc_Fifocnt) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

www.ti.com
Table 6-148. DDC I2C Data Register (DDC_DATA) Field Descriptions
Bit Field
31-8 Reserved
7-0 DDC_DATA

6.3.2.118 DDC I2C FIFO Count Register (DDC_FIFOCNT)

The DDC I2C FIFO count register is shown in
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 6-149. DDC I2C FIFO Count Register (DDC_FIFOCNT) Field Descriptions
Bit Field
31-5 Reserved
4-0 DDC_FIFOCNT
SPRUGX9 – 15 April 2011
Submit Documentation Feedback
Preliminary
Description
Reserved
DDC data input
Figure 6-140. DDC I2C FIFO Count Register (DDC_FIFOCNT)
Reserved
R-0h
Description
Reserved
FIFO data byte count (the number of bytes in the FIFO). The DDC FIFO size is 16. The maximum value for
DDC_FIFOCNT is 10h.
© 2011, Texas Instruments Incorporated
Figure 6-140 and described in
High-Definition Multimedia Interface (HDMI)
Registers
Table 6-149.
5 4
DDC_FIFOCNT
R-0h
805
0