Cm_Alwon_Sysclk4_Clkstctrl Register; Cm_Alwon_Sysclk4_Clkstctrl Register Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers

14.7.11.9 CM_ALWON_SYSCLK4_CLKSTCTRL Register

This register enables the domain power state transition. It controls the software supervised clock
domain state transition between ON-ACTIVE and ON-INACTIVE states. It also hold one status bit per
clock input of the domain.
31
11
CLKACTIVITY_L3_F_EN_GCLK
R-0
7
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 14-104. CM_ALWON_SYSCLK4_CLKSTCTRL Register Field Descriptions
Bit Field
31-12 Reserved
11 CLKACTIVITY_L3_F_EN_GCLK
10 CLKACTIVITY_L3_S_GCLK
9 CLKACTIVITY_L3_M_GCLK
8 CLKACTIVITY_SYSCLK4_GCLK
7-2 Reserved
1-0 CLKTRCTRL
1486
Power, Reset, and Clock Management (PRCM) Module
Preliminary
Figure 14-89. CM_ALWON_SYSCLK4_CLKSTCTRL Register
Reserved
10
CLKACTIVITY_L3_S_GCLK
R-0
Reserved
R-0
Value
0
0
1
0
1
0
1
0
1
0
0
1h
2h
3h
© 2011, Texas Instruments Incorporated
R-0
9
CLKACTIVITY_L3_M_GCLK
R-0
2
Description
Reserved
This field indicates the state of the L3_F_EN_GCLK clock in the
domain.
Corresponding clock is gated
Corresponding clock is active
This field indicates the state of the L3_S_GCLK clock in the domain.
Corresponding clock is gated
Corresponding clock is active
This field indicates the state of the L3_M_GCLK clock in the domain.
Corresponding clock is gated
Corresponding clock is active
This field indicates the state of the SYSCLK4_GCLK clock in the
domain.
Corresponding clock is gated
Corresponding clock is active
Reserved
Controls the clock state transition of the SYSCLK4 clock domain in
Always ON power domain.
Reserved
Reserved
SW_WKUP: Start a software forced wake-up transition on the
domain.
Reserved
www.ti.com
12
8
CLKACTIVITY_SYSCLK4_GCLK
R-0
1 0
CLKTRCTRL
R-2h
SPRUGX9 – 15 April 2011
Submit Documentation Feedback