Capabilities Register (Sd_Capa); Capabilities Register (Sd_Capa) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers

9.4.26 Capabilities Register (SD_CAPA)

This register lists the capabilities of the SD/SDIO host controller. The capabilities register (SD_CAPA) is
shown in Figure 9-54
31 29 28
Reserved 64BIT
R-0 R/W-0
15 14 13
Reserved
R-0
LEGENDR/W = Read/Write; R = Read only; -n = value after reset
Bit Field
31-29 Reserved
28 64BIT
27 Reserved
26 VS18
25 VS30
24 VS33
23 SRS
22 DS
1002
Secure Digital (SD)/—Secure Digital I/O (SDIO) Card Interface
Preliminary
and described in Table
Figure 9-54. Capabilities Register (SD_CAPA)
27 26 25
Rsvd VS18 VS30 VS33
R-0 R/W-0 R/W-0 R/W-0
BCF
R-0
Table 9-36. Capabilities Register (SD_CAPA) Field Descriptions
Value Description
0 Reserved bit field. Do not write any value.
64 Bit System Bus SupportSetting 1 to this bit indicates that the Host Controller supports
64-bit address descriptor mode and is connected to 64-bit address system bus.
Read 0 32 bit System bus address
Read 1 64 bit System bus address
0 Reserved bit. Any write to this bit results in 0.
Voltage support 1.8 V. Initialization of this register (via a write access to this register) depends
on the system capabilities. The host driver shall not modify this register after the initialization.
This register is only reinitialized by a hard reset (via RESET signal).
Read 0 1.8 V not supported
Write 0 1.8 V not supported
Read 1 1.8 V supported
Write 1 1.8 V supported
Voltage support 3.0V. Initialization of this register (via a write access to this register) depends
on the system capabilities. The host driver shall not modify this register after the initialization.
This register is only reinitialized by a hard reset (via RESET signal)
Read 0 3.0 V not supported
Write 0 3.0 V not supported
Read 1 3.0 V supported
Write 1 3.0 V supported
Voltage support 3.3V. Initialization of this register (via a write access to this register) depends
on the system capabilities. The host driver shall not modify this register after the initialization.
This register is only reinitialized by a hard reset (via RESET signal)
Read 0 3.3 V not supported
Write 0 3.3 V not supported
Read 1 3.3 V supported
Write 1 3.3 V supported
Suspend/resume support (SDIO cards only). This bit indicates whether the host controller
supports Suspend/Resume functionality.
Read 0 The Host controller does not suspend/resume functionality.
Read 1 The Host controller supports suspend/resume functionality.
DMA support. This bit indicates that the Host controller is able to use DMA to transfer data
between system memory and the Host controller directly.
Read 0 DMA not supported
Read 1 DMA supported
© 2011, Texas Instruments Incorporated
9-36.
24 23 22 21
SRS DS HSS
R-1 R-1 R-1
8 7 6 5
TCU Rsvd
R-1 R-0
www.ti.com
20 19 18 17
Rsvd AD2S Rsvd MBL
R-0 R-1 R-0 R-1h
TCF
R-0
SPRUGX9 – 15 April 2011
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