Global Parameter 1 Register (Gparam1R); Global Parameter 1 Register (Gparam1R) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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16.4.14 Global Parameter 1 Register (GPARAM1R)

The global parameter 1 register (GPARAM1R) is a read-only register that contains encoded information
about the configuration of the embedded Synopsis AHCI SATA Core.
The GPARAM1R register is shown in
31 30
ALIGN_M RX_BUFFER
R-1 R-1
23
PHY_CTRL
R-1Ah
14 13
LATCH_M BIST_M
R-0 R-0
7 6
S_HADDR M_HADDR
R-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 16-17. Global Parameter 1 Register (GPARAM1R) Field Descriptions
Bit Field
31 ALIGN_M
30 RX_BUFFER
29-28 PHY_DATA
27 PHY_RST
26-21 PHY_CTRL
20-15 PHY_STAT
14 LATCH_M
13 BIST_M
12 PHY_TYPE
11 Reserved
10 RETURN_ERR
9-8 AHB_ENDIAN
7 S_HADDR
6 M_HADDR
5-3 S_HDATA
2-0 M_HDATA
SPRUGX9 – 15 April 2011
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Preliminary
Figure 16-15
Figure 16-15. Global Parameter 1 Register (GPARAM1R)
29 28
PHY_DATA
R-0
21 20
12 11
PHY_TYPE Reserved
R-0 R-0
5
S_HDATA
R-0
Value Description
1 Rx Data Alignment. Data is always aligned.
1 Rx Data Buffer. Core includes an Rx Data Buffer.
0 PHY Data Width. Indicates width = 0 (8-bits).
0 PHY Reset Mode. Indicates that the PHY reset output is active-low.
1Ah PHY Control Width. Indicates that there are 32-bits of PHY control.
2h PHY Status Width. Indicates that there are 32-bits of PHY status.
0 Latch Mode. Indicates that the subsystem does not include latches.
0 BIST Loopback Checking Depth. Checks errors per FIS not DWORD.
0 PHY Interface Type. Indicates a non-Synopsis PHY.
0 Reserved.
1 AHB Error Response. Indicates AHB Errors are returned.
2h Bus Endianness. Indicates that endianness may be configured by input pin.
0 Slave address bus width. Indicates 32-bit wide address bus.
0 Master address bus width. Indicates 32-bit wide address bus.
0 Slave Data Bus Width. Indicates 32-bit data bus.
0 Master Data Bus Width. Indicates 32-bit data bus.
© 2011, Texas Instruments Incorporated
and described in Table 16-17.
27 26
PHY_RST
R-0
PHY_STAT
R-2h
10
RETURN_ERR
R-1
3 2
Serial ATA (SATA) Controller
Registers
24
PHY_CTRL
R-1Ah
15
9 8
AHB_ENDIAN
R-2h
0
M_HDATA
R-0
1605