Receive Fifo Dma Request Generation; Transmit Fifo Dma Request Generation (High Threshold) - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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7.2.13.3 FIFO DMA Mode Operation
In receive mode, a DMA request is generated as soon as the receive FIFO exceeds its threshold level
defined in the threshold level register (I2C_BUF.RXTRSH +1). This request should be de-asserted
when the number of bytes defined by the threshold level has been read by the DMA, by setting the
I2C_DMARXENABLE_CLR.DMARX_ENABLE_CLEAR field.
RX FIFO Max
Progammable
Threshold
(RXTRSH)
Zero Byte
DMA RX Active
In transmit mode, a DMA request is automatically asserted when the transmit FIFO is empty. This
request should be de-asserted when the number of bytes defined by the number in the threshold
register (I2C_BUF.TXTHRS+1) has been written in the FIFO by the DMA, by setting the
I2C_DMATXENABLE_CLR. DMATX_ENABLE_CLEAR field. If an insufficient number of characters are
written, then the DMA request will remain active.
transfers with different values for TXTRSH.
Figure 7-12. Transmit FIFO DMA Request Generation (High Threshold)
TX FIFO Max
Level
Progammable
Threshold
(TXTRSH)
Zero Byte
DMA TX Active
SPRUGX9 – 15 April 2011
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Preliminary
Figure 7-11. Receive FIFO DMA Request Generation
Level
© 2011, Texas Instruments Incorporated
RXTRSH
Figure 7-12 and Figure 7-13
Inter-Integrated Circuit (I2C) Controller Module
Architecture
Time
illustrate DMA TX
TXTRSH
855