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Architecture
Coding Scheme for Response Token
Response packets always start with 0 and end with a 1. The second bit is a transmitter bit0 for a card
response. The content is different for each type of response (R1, R2, R3, R4, R5, and R6) and the
content is protected by 7-bit CRC checksum. Depending on the type of commands sent to the card, the
SD_CMD register must be configured differently to avoid false CRC or index errors to be flagged on
command response (see
Specification, or the SDIO Card Specification.
Response Type
SD_CMD[17:16]
RSP_TYPE
00
01
10
10
11
(1)
The SD/SDIO host controller assumes that both clocks may be switched off, whatever the value set in the SD_SYSCONFIG[9:8]
CLOCKACTIVITY bit.
Figure 9-4
and
Figure 9-5
0
0
0
932
Secure Digital (SD)/—Secure Digital I/O (SDIO) Card Interface
Preliminary
Table
9-2). For more details about response types, see the SD Memory Card
Table 9-2. Response Type Summary
Index Check Enable
SD_CMD[20]
CICE
0
0
0
1
1
depict the 48-bit and 136-bit response packets.
Figure 9-4. 48-Bit Response Packet (R1, R3, R4, R5, R6)
0
Content
48 bits length
Figure 9-5. 136-Bit Response Packet (R2)
Content
136 bits length
© 2011, Texas Instruments Incorporated
(1)
CRC Check Enable
SD_CMD[19]
CCCE
Name of Response Type
0
No Response
1
R2
0
R3 (R4 for SD cards)
1
R1, R6, R5 (R7 for SD cards)
1
R1b, R5b
CRC
1
CRC
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1
SPRUGX9 – 15 April 2011
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