Disable The Watchdog Timer; Enable The Watchdog Timer; Watchdog Timer Registers - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers
18.3.2.2 Subsequence – Disable the Watchdog Timer
Table 18-9 lists the steps to disable the watchdog timer.
Step
Write disable sequence Data1.
Write disable sequence Data2.
18.3.2.3 Subsequence – Enable the Watchdog Timer
Table 18-10 lists the steps to enable the watchdog timer.
Step
Write enable sequence Data1.
Write enable sequence Data2.
18.4 Registers
The watchdog timer registers are listed in
The watchdog timers registers are limited to 32-bit and 16-bit data accesses;
8-bit access is not allowed and can corrupt register content.
NOTE:
• The WDT_WISR and WDT_WIRQSTATRAW registers have the same functionality.
The WDT_WISR register is used for software backward compatibility.
• The WDT_WIER and WDT_WIRQENSET/WDT_WIRQENCLR registers have the
same functionality. The WDT_WIER register is used for software backward
compatibility.
• The WDT_WIRQSTATRAW and WDT_WIRQSTAT registers give the same
information when read. The WDT_WIRQSTATRAW register is used for debug.
Address Offset
0h
10h
14h
18h
1Ch
24h
28h
2Ch
30h
34h
44h
1668
Watchdog Timer
Preliminary
Table 18-9. Disable the Watchdog Timer
Register/Bit Field/Programming Model
WDT_WSPR
WDT_WSPR
Table 18-10. Enable the Watchdog Timer
Register/Bit Field/Programming Model
WDT_WSPR
WDT_WSPR
Table
Table 18-11. Watchdog Timer Registers
Acronym
WDT_WIDR
WDT_WDSC
WDT_WDST
WDT_WISR
WDT_WIER
WDT_WCLR
WDT_WCRR
WDT_WLDR
WDT_WTGR
WDT_WWPS
WDT_WDLY
© 2011, Texas Instruments Incorporated
18-11.
CAUTION
www.ti.com
Value
XXXX AAAAh
XXXX 5555h
Value
XXXX BBBBh
XXXX 4444h
Section
Section 18.4.1
Section 18.4.2
Section 18.4.3
Section 18.4.4
Section 18.4.5
Section 18.4.6
Section 18.4.7
Section 18.4.8
Section 18.4.9
Section 18.4.10
Section 18.4.11
SPRUGX9 – 15 April 2011
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