Mcbsp_Drr_Reg; Mcbsp_Drr_Reg Field Descriptions; Mcbsp_Dxr_Reg Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
Table of Contents

Advertisement

www.ti.com
11.3.1 McBSP Data Receive Register (DRR_REG)
The McBSP_DRR_REG register is shown in
31
LEGEND: R = Read only; -n = value after reset
Bits
Field Name
Value
31-0
DRR
0
11.3.2 McBSP Data Transmit Register (DXR_REG)
The McBSP_DXR_REG register is shown in
31
LEGEND: W = Write only; -n = value after reset
Bits
Field Name
Value
31-0
DXR
0
SPRUGX9 – 15 April 2011
Submit Documentation Feedback
Preliminary
Figure 11-33
Figure 11-33. McBSP_DRR_REG
DRR
Table 11-20. McBSP_DRR_REG Field Descriptions
Description
Data receive register.
Figure 11-34
Figure 11-34. McBSP_DRR_REG
Table 11-21. McBSP_DXR_REG Field Descriptions
Description
Data transmit register.
© 2011, Texas Instruments Incorporated
and described in
R-0
and described in
DXR
W-0
Multichannel Buffered Serial Port (McBSP)
Registers
Table
11-20.
Table
11-21.
0
0
1177

Advertisement

Table of Contents
loading

Table of Contents