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Registers
13.4.8.12 LINK_CTRL2 Register
31
15
Reserved
R-0
7
6
TX_MARGIN
SEL_DEEMPH
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-17
Reserved
16
DE_EMPH
15-13
Reserved
12
POLL_DEEMPH
11
CMPL_SOS
10
ENTR_MOD_COMPL
9-7
TX_MARGIN
6
SEL_DEEMPH
5
HW_AUTO_SPEED_DIS
4
ENTR_COMPL
3-0
TGT_SPEED
1372
Peripheral Component Interconnect Express (PCIe)
Preliminary
Figure 13-116. LINK_CTRL2 Register
Reserved
R-0
13
12
POLL_DEEMPH
R/W-0
5
HW_AUTO_SPEED_DIS
R/W-0
Table 13-123. LINK_CTRL2 Register Field Descriptions
Value
Description
0
Reserved
0
Current De-emphasis level
0
Reserved
0
DE-emphasis level in polling-compliance state
0
Compliance SOS
0
Enter modified compliance
0-7h
Value of non-de-emphasized voltage level at transmitter pins
0
Selectable De-emphasis (0 for 6 dB and 1 for 3.5 dB)
0
Hardware autonomous speed disable
0
Enter compliance
0-Fh
Gen-1 is 1h and Gen-2 is 2h.
© 2011, Texas Instruments Incorporated
11
10
CMPL_SOS
ENTR_MOD_COMPL
R/W-0
R/W-0
4
3
ENTR_COMPL
R/W-0
www.ti.com
17
16
DE_EMPH
R-1
9
8
TX_MARGIN
R/W-0
0
TGT_SPEED
R/W-2h
SPRUGX9 – 15 April 2011
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