Port Phy Status Register (P#Physr); Port Phy Status Register (P#Physr) Field Description - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
Table of Contents

Advertisement

Registers
16.4.35 Port PHY Status Register (P#PHYSR) (# = 0 or 1)
The port PHY status register (P#PHYSR) is used to reflect the PHY status. Note: In multi-port
configurations, each of these registers will read identically, i.e. P0PHYSR and P1PHYSR will have the
same value.
The P#PHYSR register is shown in
31
15
LEGEND: R = Read only; -n = value after reset
Table 16-38. Port PHY Status Register (P#PHYSR) Field Description
Bit
Field
Value
31-2
Reserved
0
1
SIGDET
0-1
0
LOCK
0-1
1630
Serial ATA (SATA) Controller
Preliminary
Figure 16-36
Figure 16-36. Port PHY Status Register (P#PHYSR)
Reserved
Reserved
R-0
Description
Reserved.
Signal Detect. Indicates that Port # has a signal present.
PLL Lock. Indicates that the PLL has locked.
© 2011, Texas Instruments Incorporated
and described in
Table
R-0
www.ti.com
16-38.
1
0
SIGDET
LOCK
R-0
R-0
SPRUGX9 – 15 April 2011
Submit Documentation Feedback
16

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the TMS320C6A816 Series and is the answer not in the manual?

Table of Contents