Mcbsp_Xcere_Reg; Mcbsp_Xcerf_Reg - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
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11.3.24 McBSP Transmit Channel Enable Register Partition E (XCERE_REG)
The McBSP_XCERE_REG register is shown in
31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-16
Reserved
15-0
XCERE
11.3.25 McBSP Transmit Channel Enable Register Partition F (XCERF_REG)
The McBSP_XCERF_REG register is shown in
31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-16
Reserved
15-0
XCERF
SPRUGX9 – 15 April 2011
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Preliminary
Figure 11-56. McBSP_XCERE_REG
R-0
Table 11-43. McBSP_XCERE_REG Field Descriptions
Value
Description
0
Reserved.
0
Transmit Channel Enable.
XCERE n=0 Disables transmission of n-th channel in an event-numbered block in partition E.
XCERE n=1 Enables transmission of n-th channel in an event-numbered block in partition E.
Figure 11-57. McBSP_XCERF_REG
R-0
Table 11-44. McBSP_XCERF_REG Field Descriptions
Value
Description
0
Reserved.
0
Transmit Channel Enable.
XCERF n=0 Disables transmission of n-th channel in an even-numbered block in partition F.
XCERF n=1 Enables transmission of n-th channel in an even-numbered block in partition F.
© 2011, Texas Instruments Incorporated
Figure 11-56
and described in
16 15
Figure 11-57
and described in
16 15
Multichannel Buffered Serial Port (McBSP)
Registers
Figure
19-35.
XCERE
R/W-0
Table
11-44.
XCERF
R/W-0
0
0
1197

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