I2C Own Address 3 Register (I2C_Oa3); I2C Own Address 3 Register (I2C_Oa3) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers

7.3.30 I2C Own Address 3 Register (I2C_OA3)

During an active transfer phase (between STT has been set to 1 and
receiving of ARDY), no modification must be done in this register. Changing
it may result in an unpredictable behavior.
This register is used to specify the first alternative I2C 7-bit or 10-bit address (own address 3 - OA3).
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 7-33. I2C Own Address 3 Register (I2C_OA3) Field Descriptions
Bit Field
31-10 Reserved
9-0 OA3
898
Inter-Integrated Circuit (I2C) Controller Module
Preliminary
Figure 7-44. I2C Own Address 3 Register (I2C_OA3)
Reserved
R-0
Value Description
0 Reserved
0-3FFh Own address 2. This field specifies either:
• A 10-bit address coded on OA3 [9:0] when XOA3 (Expand Own Address 3 - XOA3,
I2C_CON[4]) is set to 1.
• A 7-bit address coded on OA3 [6:0] when XOA1 (Expand Own Address 3 – XOA3,
I2C_CON[4]) is cleared to 0. In this case, OA3 [9:7] bits must be cleared to 000 by application
software.
Value after reset is low (all 10 bits).
© 2011, Texas Instruments Incorporated
CAUTION
10 9
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0
0A3
R/W-0
SPRUGX9 – 15 April 2011
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