I2C Own Address 2 Register (I2C_Oa2); I2C Own Address 2 Register (I2C_Oa2) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

www.ti.com

7.3.29 I2C Own Address 2 Register (I2C_OA2)

During an active transfer phase (between STT has been set to 1 and
receiving of ARDY), no modification must be done in this register. Changing
it may result in an unpredictable behavior.
This register is used to specify the first alternative I2C 7-bit or 10-bit address (own address 2 - OA2).
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 7-32. I2C Own Address 2 Register (I2C_OA2) Field Descriptions
Bit Field
31-10 Reserved
9-0 OA2
SPRUGX9 – 15 April 2011
Submit Documentation Feedback
Preliminary
Figure 7-43. I2C Own Address 2 Register (I2C_OA2)
Reserved
R-0
Value Description
0 Reserved
0-3FFh Own address 2. This field specifies either:
• A 10-bit address coded on OA2 [9:0] when XOA1 (Expand Own Address 2 - XOA2,
I2C_CON[5]) is set to 1.
• A 7-bit address coded on OA2 [6:0] when XOA2 (Expand Own Address 2 – XOA2,
I2C_CON[5]) is cleared to 0. In this case, OA2 [9:7] bits must be cleared to 000 by application
software.
Value after reset is low (all 10 bits).
© 2011, Texas Instruments Incorporated
CAUTION
10 9
Inter-Integrated Circuit (I2C) Controller Module
Registers
0
0A2
R/W-0
897