Cfg_Setup Register; Iobase Register; Iobase Register Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
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13.4.4.3 CFG_SETUP Register

The config transaction setup register (CFG_SETUP) is described in the figure and table below.
31
Reserved
R-0
15
13
12
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-25
Reserved
24
CFG_TYPE
23-16
CFG_BUS
15-13
Reserved
12-8
CFG_DEVICE
7-3
Reserved
2-0
CFG_FUNC

13.4.4.4 IOBASE Register

The IO TLP base register (IOBASE) is described in the figure and table below.
31
15
12
IOBASE
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-12
IOBASE
11-0
Reserved
SPRUGX9 – 15 April 2011
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Preliminary
Figure 13-15. CFG_SETUP Register
25
24
CFG_TYPE
R/W-0
CFG_DEVICE
R/W-0
Table 13-18. CFG_SETUP Register Field Descriptions
Value
Description
0
Reserved
0
Configuration Type for outbound configuration accesses. Set for Type 1 access and clear for Type
0 access.
0-FFh
PCIe Bus number for outbound configuration accesses
0
Reserved
0-1Fh
PCIe Device number for outbound configuration accesses
0
Reserved
0-7h
PCIe Function number for outbound configuration accesses
Figure 13-16. IOBASE Register
11
Table 13-19. IOBASE Register Field Descriptions
Value
Description
0-F FFFFh
Bits 31-12 of outgoing IO TLP. RC mode only.
0
Reserved
© 2011, Texas Instruments Incorporated
23
8
7
Reserved
R-0
IOBASE
R/W-0
Reserved
R-0
Peripheral Component Interconnect Express (PCIe)
Registers
CFG_BUS
R/W-0
3
2
CFG_FUNC
R/W-0
16
0
16
0
1311

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