Spread-Spectrum Clock Generation - Xilinx 7 Series User Manual

Fpgas clocking resources
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Chapter 3: Clock Management Tile

Spread-Spectrum Clock Generation

Spread-spectrum clock generation (SSCG) is widely used by manufacturers of electronic
devices to reduce the spectral density of the electromagnetic interference (EMI) generated
by these devices. Manufacturers must ensure that levels of electromagnetic energy emitted
do not interfere with the operation of other nearby electronic devices. For example, the
clarity of a phone call should not degrade when the phone is next to a video display. In the
same way, the display should not be affected when the phone is used.
Electromagnetic Compatibility (EMC) regulations are used to control the noise or EMI that
causes these disturbances. Typical solutions for meeting EMC requirements involve
adding expensive shielding, ferrite beads, or chokes. These solutions can adversely impact
the cost of the final product by complicating PCB routing and forcing longer product
development cycles.
SSCG spreads the electromagnetic energy over a large frequency band to effectively reduce
the electrical and magnetic field strengths measured within a narrow window of
frequencies. The peak electromagnetic energy at any one frequency is reduced by
modulating the SSCG output.
The MMCME2 can generate a spread-spectrum clock from a standard fixed frequency
oscillator when SS_EN is set to TRUE (see
frequency is modulated along with CLKFBOUT and CLKOUT[6:4,1,0]. Clock outputs
CLKOUT[3:2] are used to control the modulation period and are not available for general
use. As long as the clock frequency is adjusted slowly, the spread spectrum will not affect
the period jitter of the MMCME2.
X-Ref Target - Figure 3-17
Adjusting the modulation period SS_MOD_PERIOD allows the FPGA designer to direct
the tools to select the closest modulation period based on the MMCME2 settings. The
spread-spectrum modulation will reduce EMI as long as the modulation frequencies are
higher than the audible frequency range of 30 kHz. Typically, lower modulation
frequencies are preferred by designers to minimize the impact of the introduction of
spread spectrum.
Increasing the frequency deviation with SS_MODE (CENTER_HIGH or DOWN_HIGH)
will increase the overall EMI reduction, but care must be taken to ensure that the increased
range of frequencies does not affect the overall system operation (see
the spread-spectrum clock and the input clock are operating at different frequencies, any
data being transferred between the clock domains should use an asynchronous FIFO to
ensure that data is not lost. Increasing the frequency deviation will require a larger FIFO.
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92
Modulation Period
F
IN
Figure 3-17: Center-Spread Modulation
www.xilinx.com
Figure
3-17). Within the MMCME2, the VCO
Time
7 Series FPGAs Clocking Resources User Guide
UG472 (v1.5) July 13, 2012
Frequency
Deviation
UG472_c3_01_070212
Figure
3-18). Because

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