Xilinx 7 Series User Manual page 64
Fpgas clocking resources
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- User manual (306 pages) ,
- User manual (74 pages) ,
- User manual (58 pages)
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Chapter 3: Clock Management Tile
X-Ref Target - Figure 3-3
Clock
General
Switch
Routing
Circuit
CLKIN1
CLKIN2
CLKFB
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64
Lock Detect
Lock Monitor
D
PFD
CP
Figure 3-3: Detailed PLL Block Diagram
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Lock
8-phase taps
8
LF
VCO
7 Series FPGAs Clocking Resources User Guide
O0
CLKOUT0
CLKOUT1
O1
CLKOUT2
O2
CLKOUT3
O3
CLKOUT4
O4
CLKOUT5
O5
M
CLKFBOUT
ug472_c2_03_030211
UG472 (v1.5) July 13, 2012
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