Sun Microsystems UltraSPARC-I User Manual page 363

UltraSPARC User's Manual
Table F-1 ASI Names (Alphabetical) (Continued)
ASI Name or Macro Syntax
ASI_IC_TAG
ASI_IMMU
ASI_IMMU
ASI_IMMU
ASI_IMMU
ASI_IMMU_DEMAP
ASI_IMMU_TSB_64KB_PTR_REG
ASI_IMMU_TSB_8KB_PTR_REG
ASI_INTR_DISPATCH_STATUS
ASI_INTR_RECEIVE
ASI_ITLB_DATA_ACCESS_REG
ASI_ITLB_DATA_IN_REG
ASI_ITLB_TAG_READ_RE G
ASI_ITLB_TAG_READ_REG
ASI_LSU_CONTROL_REG
ASI_N
ASI_NL
ASI_NUCLEUS
ASI_NUCLEUS_LITTLE
ASI_NUCLEUS_QUAD_LDD
ASI_NUCLEUS_QUAD_LDD_L
ASI_NUCLEUS_QUAD_LDD_LITTLE
ASI_P
ASI_PHYS_BYPASS_EC_WITH_EBIT
ASI_PHYS_BYPASS_EC_WITH_EBIT_L
ASI_PHYS_BYPASS_EC_WITH_EBIT_LITTLE Physical address, noncacheable, with side-effect, little
ASI_PHYS_USE_EC
ASI_PHYS_USE_EC_L
ASI_PHYS_USE_EC_LITTLE
ASI_PL
ASI_PNF
ASI_PNFL
ASI_PRIMARY
ASI_PRIMARY_LITTLE
ASI_PRIMARY_NO_FAULT
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Description
I-Cache tag/valid RAM diagnostic access
I-MMU Synchronous Fault Status Register
I-MMU Tag Target Register
I-MMU TLB Tag Access Register
I-MMU TSB Register
I-MMU TLB demap
I-MMU TSB 64KB Pointer Register
I-MMU TSB 8KB Pointer Register
Interrupt vector dispatch status
Interrupt vector receive status
I-MMU TLB Data Access Register
I-MMU TLB Data In Register
I-MMU TLB Tag Read Register
I-MMU TLB Tag Read Register
Load/store unit control register
Implicit address space, nucleus privilege, TL > 0,
Implicit address space, nucleus privilege, TL > 0, little
endian
Implicit address space, nucleus privilege, TL > 0,
Implicit address space, nucleus privilege, TL > 0, little
endian
Cacheable, 128-bit atomic LDDA
Cacheable, 128-bit atomic LDDA, little endian
Cacheable, 128-bit atomic LDDA, little endian
Implicit primary address space
Physical address, noncacheable, with side-effect
Physical address, noncacheable, with side-effect, little
endian
endian
Physical address, external cacheable only
Physical address, external cacheable only, little endian
Physical address, external cacheable only, little endian
Implicit primary address space, little endian
Primary address space, no fault
Primary address space, no fault, little endian
Implicit primary address space
Implicit primary address space, little endian
Primary address space, no fault
Value
67
16
50
16
50
16
50
16
50
16
57
16
52
16
51
16
48
16
49
16
55
16
54
16
56
16
56
16
45
16
04
16
0C
16
04
16
0C
16
24
16
2C
16
2C
16
80
16
15
16
1D
16
1D
16
14
16
1C
16
1C
16
88
16
82
16
8A
16
80
16
88
16
82
16