Sun Microsystems UltraSPARC-I User Manual page 223

UltraSPARC User's Manual
13.5.4 Partitioned Multiply Instructions
opcode
FMUL8x16
FMUL8x16AU
FMUL8x16AL
FMUL8SUx16
FMUL8ULx16
FMULD8SUx16
FMULD8ULx16
Format (3):
10 rd
31 30 29 25
Suggested Assembly Language Syntax
fmul8x16
fmul8x16au
fmul8x16al
fmul8sux16
fmul8ulx16
fmuld8sux16
fmuld8ulx16
The following sections describe the variations of partitioned multiply.
Note: For good performance, do not use the result of a partitioned multiply as a
32-bit graphics instruction source operand in the next three instruction groups.
Traps
fp_disabled
Note: When software emulating an 8-bit unsigned by 16-bit signed multiply, the
unsigned value must be zero-extended and the 16-bit value must be sign-
extended before the multiplication.
Sun Microelectronics
208
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
opf
8- × 16-bit partitioned product
0 0011 0001
8- × 16-bit upper α partitioned product
0 0011 0011
8- × 16-bit lower α partitioned product
0 0011 0101
upper 8- × 16-bit partitioned product
0 0011 0110
lower unsigned 8- × 16-bit partitioned product
0 0011 0111
upper 8- × 16-bit partitioned product
0 0011 1000
lower unsigned 8- × 16-bit partitioned product
0 0011 1001
11 0110 rs1
24 19 18
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
freg , freg , freg
rs1 rs2 rd
operation
opf
14 13 5
rs2
4 0